If you’re buying a PC or server, you’ve likely considered chips based on x86 or, perhaps less often, the ARM architecture.
But like Linux in software, an open-source chip project is out to break the dominance of proprietary chips offered by Intel, AMD, and ARM.
The RISC-V open-source architecture, created by researchers at the University of California, Berkeley, in 2010, is open to all who want to use it. The RISC-V design can be modified for PCs, servers, smartphones, wearables, and other devices.
A startup called SiFive is the first to make a business out of the RISC-V architecture. The company is also the first to convert the RISC-V instruction set architecture into actual silicon. The company on Thursday announced it has created two new chip designs that can be licensed.
RISC-V shares the ethos of open-source software, with the community working together to share, advance, and modify the architecture.
Since the project’s inception, the interest in RISC-V has ballooned, with some of the big IT companies showing interest in the architecture. The RISC-V Foundation — which manages and promotes the architecture — counts Google, Microsoft, Qualcomm, AMD, Huawei, and others among its 60 members.
Nvidia is expected to use the microcontroller-style RISC-V designs in its chips, Companies like Google are developing chips in-house and could tweak RISC-V for servers, which could save them from buying Intel’s expensive chips.
SiFive’s new 32-bit E31 Coreplex processor design is targeted at IoT devices, wearables, and low-power devices. The 64-bit CorePlex E51 could be used in servers, network processors, storage devices, and edge computing devices.
Like many Linux and open-source vendors, the goal of SiFive is to monetize the RISC-V design but at a modest cost. The new chip designs can be licensed for a fixed price from SiFive, but the company will not charge royalties. That makes it attractive alternative compared to chip designs from ARM and Imagination Technologies, which charge licensing fees and royalties.
There’s a lot of excitement around RISC-V, and licensing chip designs like CorePlex will help spread its adoption, said Krste Asanovic, a co-founder and chief architect at SiFive. He is one of the inventors of RISC-V.
SiFive will also make chips starting later this year. The company earlier released the HiFive1 low-power board based on its RISC-V chip. The boards sold in the thousands.
The company didn’t provide the licensing prices for the CorePlex designs, but ordering them will be straightforward, SiFive officials said. Users can go on the SiFive websiteand get a direct quote.
The RISC-V chip design is already a big hit in the academic circuits with many working groups discussing advances. The design was initially founded for academic purposes but was turned into a practical chip design by SiFive.
Some other open-source chips like OpenSPARC have lingered around but are based on old designs. The RISC-V Foundation has aggressively promoted the architecture, especially at Hot Chips, an annual gathering of semiconductor professionals.
The RISC-V architecture has a different design than the highly integrated x86, Power, and to an extent, the ARM designs. It’s modular, meaning that independent co-processing circuits can be attached to the central RISC-V design. For example, a security or networking coprocessor can be tacked onto the core design. That makes the RISC-V highly flexible, Asanovic said.
SiFive is working on vector extensions, which will be helpful for high-performance computing. The core RISC-V design being promoted by RISC-V Foundation will remain constant, but SiFive has forked its own design and will keep advancing it.
There’s a shift to modular chip designs as integrating components becomes challenging. Moore’s Law is also lapsing, creating new opportunities in chip design.
Integrating a CPU, GPU, and other circuits in one chip, like with Intel’s and AMD’s chips, has its own advantages, but questions remain on how long could this continue as manufacturing challenges mount. Intel is already relying on co-processors like Altera FPGAs and Nervana deep-learning chips to take on new tasks like machine learning and computing in autonomous cars.
The CorePlex IP allows the chips to be made using different manufacturing technologies, Asanovic said.
For those that want to test RISC-V, it can be tested on FPGAs. A fork of Linux for RISC-V has also been created, meaning software support is growing, Asanovic said.